Electronics · Digital logic and control / Principles and inquiry
Flip-flops and counters experiment guide
Compare latch memory, rising-edge flip-flops and the cycle of a 4-bit counter.
How does it work?
A D flip-flop stores input only on rising edges; a 4-bit counter repeats every 16 clocks.
Key relationship
D-FF: Qnext = D (↑CLK) · counter = (Q₀+n) mod 16
Try this investigation
- Compare latch memory, rising-edge flip-flops and the cycle of a 4-bit counter.
- Run and record each of the three baseline presets.
- Compare the changed variable and its result with the baseline records.
Interpreting your results
For a D flip-flop with Q=1 and D=0, what is Q when the clock falls from 1 to 0?
1
Assumptions and limitations
Metastability and propagation delay are omitted. The forbidden SR state is not treated as a valid bit. Experiment on screen; do not reproduce this with real power supplies, outlets or high voltage.