Meaning and mechanism
When continuous signals are read at regular intervals, they become a sample rate sequence. The process of representing each sample with one of a finite set of codes is quantization.
If the sampling is done too slowly, different original frequencies can appear as the same sample. This is referred to as aliasing, and increasing the number of bits does not eliminate the temporal ambiguity.
Relationships and conditions
The only way to restore an ideal anti-aliasing signal requires sampling at twice the highest frequency, as well as appropriate conditions. The code interval, including the endpoint of the experiment, is the total range divided by (2ⁿ−1).
The actual definition of the code width for ADC can vary. fs=2f The boundaries are sensitive to the phase, and in actual systems, anti-aliasing filters and the reserve frequency are also considered.
What to observe in the simulation
Aliasing occurs below twice the signal frequency, while more bits reduce quantization steps.
Noise, jitter and real ADC nonlinearities are omitted. The fs=2f boundary is phase-sensitive and is not marked safe. Experiment on screen; do not reproduce this with real power supplies, outlets or high voltage.
Key relationships and symbols
Δ = 4/(2ⁿ−1) · falias = |f−round(f/fs)fs|
| Symbol | Meaning | Unit |
|---|---|---|
| fs | Sampling frequency | Hz |
| n | Quantization bits | bit |
| Δ | Spacing between adjacent code values in the simulation | V |
Worked example
What is the step size for 4-bit quantization from −2 V to +2 V including both endpoints?
About 0.267 V
Common misconceptions
- Increasing the quantization bit count alone cannot resolve aliasing of low sampling frequencies.